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W83321S/W83321G
Winbond N-Channel FET Synchronous Buck Regulator Controller W83321S W83321G
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Publication Release Date: January, 2006 Revision 0.51
W83321S/W83321G
W83321S Data Sheet Revision History
PAGES DATES VERSION VERSION ON WEB MAIN CONTENTS
1 2 5
2004/3/19 2005/1/21
0.5 0.51
N.A N.A
All versions before 0.5 are for internal use only. 1. Add Pb-free part no:W83321G 2. Add separate VCC12 rail for VBOOT application circuit.
Please note that all data and specifications are subject to change without notice. All the trademarks of products and companies mentioned in this datasheet belong to their respective owners. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales.
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W83321S/W83321G
Table of Content1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. GENERAL DESCRIPTION ......................................................................................................... 4 FEATURES ................................................................................................................................. 4 APPLICATIONS .......................................................................................................................... 5 PIN-OUT ..................................................................................................................................... 5 PIN DESCRIPTION..................................................................................................................... 6 INTERNAL BLOCK DIAGRAM ................................................................................................... 7 APPLICATION CIRCUIT............................................................................................................. 8 LAYOUT PLACEMENT............................................................................................................... 9 ELECTRICAL CHARACTERISTICS......................................................................................... 10 TYPICAL OPERATING WAVEFORMS .................................................................................... 11 PACKAGE DIMENSION OUTLINE........................................................................................... 16 ORDERING INSTRUCTION ..................................................................................................... 17 HOW TO READ THE TOP MARKING...................................................................................... 17
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Publication Release Date: January, 2006 Revision 0.51
W83321S/W83321G
1. GENERAL DESCRIPTION
The W83321S is a high-speed, N-Channel synchronous buck regulator controller. The W83321S employs fixed-frequency voltage-mode PWM control architecture. Both high-side and low-side MOSFETs are lower cost N-Channel type. The regulator is biased from a 5V rail and the power for the high-side MOSFET can be supplied by a separate 12V rail or supplied from a local charge pump. Current limit is achieved by monitoring the voltage drop across the on resistance of the low-side MOSFET. This method eliminates the requirement of extra current sensing resistor and avoids false trigger of OC protection when VIN varies. The adaptive non-overlapping MOSFET gate drivers help avoid potential shoot-through problems while maintaining high efficiency.
2. FEATURES
Operates from +5V Input 0.8V to VIN Output Range - 0.8V Internal Reference - 1.5% Over Line Voltage and Temperature Drives N-Channel MOSFETs Simple Single-Loop Control Design - Voltage-Mode PWM Control Fast Transient Response Lossless, Programmable Overcurrent Protection - Uses Lower MOSFET's Rds (on) - Current limit without sense resistor Small Converter Size - 250 kHz Fixed Frequency Oscillator - Internal Soft Start - Tiny plastic SOP-8 package
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W83321S/W83321G
3. APPLICATIONS
Motherboard Power Supplies Regulation Subsystem Power Supplies - PCI/AGP/GTL+ Buses - ACPI Power Control - SSTL-2 and DDR SDRAM Bus Termination Supply Cable Modems, Set Top Boxes, and DSL Modems DSP and Core Communications Processor Supplies Memory Power Supplies Personal Computer Peripherals Industrial Power Supplies 5V-Input DC-DC Regulators Low-Voltage Distributed Power Supplies
4. PIN-OUT
BOOT UGATE GND LGATE
1 2 3 4
8
ISEN COMP FB VCC
W83321
7 6 5
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Publication Release Date: January, 2006 Revision 0.51
W83321S/W83321G
5. PIN DESCRIPTION
PIN NAME FUNCTION
1 2 3 4 5 6 7 8
BOOT UGATE GND LGATE VCC FB COMP ISEN
Supply rail for the high-side MOSFET driver. A bootstrap circuit may be used to create a BOOT voltage or a separate 12V supply can be used. Gate drive for the high-side N-channel MOSFET. This pin is also monitored by the adaptive shoot through protection circuitry to determine when the high-side MOSFET has turned off. Ground for analog circuit. Connect it to system ground. Gate drive for the low-side N-channel MOSFET. This pin is also monitored by the adaptive shoot through protection circuitry to determine when the low-side MOSFET has turned off. +5V supply rail for the lower gate driver and control logic circuit. Inverting Input of the Error Amplifier. This pin is available for compensation of the control loop. Internal Error Amplifier Output Pin. This pin is available for compensation of the control loop and pulling this pin low with an open drain device will shutdown the IC. Current limit threshold setting. Connect a resistor (ROCSET) between this pin and the drain of the low-side MOSFET.
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W83321S/W83321G
6. INTERNAL BLOCK DIAGRAM
VDD
POR
90A
VREF 0.8V
Soft Start Ramp
ISEN
Control Logic
BOOT
+
FB COMP
EA
-
Output Clamp
+ -
Gate Control Logic
VDD
UGATE
Oscillator 250KHz
Ramp Generator
LGATE
1.5Vp-p
GND
MOSFET Gate Drivers Power for the high-side driver is through the BOOT pin. This voltage can be supplied by a separate, higher voltage source, or supplied from a local charge pump structure or even the combination of the two. Since the voltage of the low-side MOSFET gate and the high-side MOSFET gate are being monitored to determine the state of the MOSFET, it should be considered carefully to add external components between the gate drivers and their respective MOSFET gates. Doing so may interfere with the shootthrough protection. Current Limit (Over current protection) Current limit is realized by sensing the voltage across the low-side MOSFET while it is on. This method enhances the converter's effeciency and reduces cost by eliminating a current sensing resistor. While low-side MOSFET is turned on, a constant current of 90uA is forced through ROCSET which is an external resistor connected between phase and ISEN, causing a fixed voltage drop. This fixed voltage is compared against VDS and if the latter is higher, the chip enters current limit mode. In the current limit mode both the high-side and low-side MOSFETS are turned off. After a 25ms delay, a soft-start Publication Release Date: January, 2006 Revision 0.51
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W83321S/W83321G
cycle is initiated. If the cause of the overcurrent is still present after the delay interval, the current limit would be triggered again. The shut dowm - delay - soft start cycle will be repeated indefinitely untill the overcurrent event has cleared. IPEAK = (IOCSET x ROCSET) / RDS(ON) RDS(ON):Low Side MOSFET Resistance
7. APPLICATION CIRCUIT
Local charge pump for VBOOT application:
R1 3.7K C1 0.1uF VCC5 D1 1 C2 2000uF C3 Q1 1uF N DSG 12 1N4148/Shuttky 1 2 3 3 4
U1 BOOT UGATE GND LGATE ISEN COMP FB VCC W83321S R5 16K(1%) R6 7.5K(1%) 8 7 6 5 C5 2.2nF R4 10 C9 1uF R2 100K C4 (OPT)
VOUT=0.8X(R5+R6)/R6 C6 2000uF C7 2000uF
L1 C8 0.1uF
3.3uH
3
R3 2.2 C10 6.8nF
Q2 N DSG 2
VCC5
Separate VCC12 rail for VBOOT application:
R1 3.7K R7 10 C1 1000uF C11 1uF 1 3 2 3 3 4
VCC12 VCC5 1
U1 BOOT UGATE GND LGATE ISEN COMP FB VCC W83321S R5 16K(1%) R6 7.5K(1%) 8 7 6 5 C5 2.2nF R4 10 C9 1uF R2 100K C4 (OPT)
VOUT=0.8X(R5+R6)/R6 C6 2000uF C7 2000uF
L1 C8 0.1uF
3.3uH
C2 2000uF
C3 Q1 1uF N DSG 12
R3 2.2 C10 6.8nF
Q2 N DSG 2
VCC5
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W83321S/W83321G
8. LAYOUT PLACEMENT
G D S G D S PIN1 C1 0.1uF L1
Q1
C3 1uF
C2 2000uF
C9 1uF
VCC W83321S BOOT
Q2
C6 2000uF
C7 2000uF
Layout Notes:
1.Put Q1 and Q2 as close as possible and using wide,short printed circuit traces between Q1 source and Q2 drain. 2.Put C2 and C3 to be near the Q1 drain and Q2 source nodes. 3.Put C1 as close as to BOOT pin. 4.Put C9 as close as to VCC pin.
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Publication Release Date: January, 2006 Revision 0.51
W83321S/W83321G
9. ELECTRICAL CHARACTERISTICS
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
VCC SUPPLY CURRENT Nominal Supply POWER-ON RESET Rising VDD Threshold Falling VDD Threshold OSCILLATOR Free Running Frequency Ramp Amplitude REFERENCE Reference Voltage Tolerance Reference Voltage ERROR AMPLIFIER DC Gain Gain-Bandwidth Slew Rate GATE DRIVERS High-side Gate Source High-side Gate Sink Low-side Gate Source Low-side Gate Sink ISEN Current Source Disable Threshold IHGATE-SRC IHGATE-SNK ILGATE-SRC ILGATE-SNK VBOOT=12V,VUGATE=6V VBOOT=12V,VUGATE=6V VCC=5V, VLGATE=2.5V VCC=5V, VLGATE=2.5V 250 600 250 300 mA mA mA mA 85 5.5 4.1 dB MHz V/S VREF -1.5 0.8 1.5 % V VOSC 200 250 1.5 300 kHz VP-P 4.3 3.7 4.5 V V ICC EN=VCC; UGATE and LGATE Open 3 mA
PROTECTION/DISABLE ISEN VCOMP 72 90 0.4 108 A V
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W83321S/W83321G
10. TYPICAL OPERATING WAVEFORMS
Dead Time: VCC=5V; VOUT=2.5V Channel 1: UGATE Channel 2: LGATE
Dead Time: VCC=5V; VOUT=2.5V Channel 1: UGATE Channel 2: LGATE
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Publication Release Date: January, 2006 Revision 0.51
W83321S/W83321G
Power On: VCC=5V; VOUT=2.5V Channel 1: VCC Channel 2: VOUT
Power Off: VCC=5V; VOUT=2.5V Channel 1: VCC Channel 2: VOUT
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W83321S/W83321G
Bootstrap: VCC=5V; VOUT=2.5V Channel 1: UGATE Channel 2: LGATE Channel 3: BOOT
Soft Start: VCC=5V; VOUT=2.5V Channel 1: UGATE Channel 2: VOUT
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Publication Release Date: January, 2006 Revision 0.51
W83321S/W83321G
Load Transient: VCC=5V; VOUT=2.5V; Cout=2200uF Channel 3: VOUT Channel 4: Iout (Loading=0 5A)
Load Transient: VCC=5V; VOUT=2.5V; Cout=2200uF Channel 3: VOUT Channel 4: Iout (Loading=5 0A)
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W83321S/W83321G
Short Hiccup: VCC=5V; VOUT=2.5V; Cout=2200uF with R=0.1(ohm) load. Channel 1: UGATE Channel 2: VOUT Channel4: Iout
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Publication Release Date: January, 2006 Revision 0.51
W83321S/W83321G
11. PACKAGE DIMENSION OUTLINE 8L SOP (150mil)
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W83321S/W83321G
12. ORDERING INSTRUCTION
PART NO. PACKAGE REMARKS
W83321S W83321G
8-pin SOP 8-pin SOP
Operation - Commercial 0~70 Operation - Commercial 0~70 Pb-free package
13. HOW TO READ THE TOP MARKING
W83 321S 323GA
W83 321G 323GA
Left Line: Winbond Logo 1
st
and 2nd Line: the part number,321G is for Pb-free package
3rd Line: Tracking Code 323: packages assembled in Year 03', week 23 G: assembly house ID; G means GR, O means OSE, etc. A: the IC version
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Publication Release Date: January, 2006 Revision 0.51
W83321S/W83321G
Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this data sheet belong to their respective owners.
Important Notice
Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or sustain life. Further more, Winbond products are not intended for applications wherein failure of Winbond products could result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales.
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